Crystek晶振,CCLD-034無(wú)鉛環(huán)保晶體,CCLD-034X-50-162.000晶振，小型SMD進(jìn)口有源晶振,從最初超大體積到現(xiàn)在的7050mm,6035mm,5032mm,3225mm,2520mm體積,有著翻天覆地的改變,體積的變小也使產(chǎn)品帶來(lái)了更高的穩(wěn)定性能,接縫密封石英晶體振蕩器,精度高,覆蓋頻率范圍寬的特點(diǎn),SMD高速自動(dòng)安裝和高溫回流焊設(shè)計(jì),Optionable待機(jī)輸出三態(tài)輸出功能,電源電壓范圍:1.8V~5V,高穩(wěn)定性,低抖動(dòng),低功耗,主要應(yīng)用領(lǐng)域:無(wú)線通訊,高端智能手機(jī),平板筆記本W(wǎng)LAN,藍(lán)牙,數(shù)碼相機(jī),DSL和其他IT產(chǎn)品的晶振應(yīng)用,三態(tài)功能,PC和LCDM等高端數(shù)碼領(lǐng)域,符合RoHS/無(wú)鉛.

Frequency Range:	162.000 MHz to 250.000 MHz
Frequency Stability Options(ppm):	±20, ±25, ±50, ±100
Temperature Range:            (Option M)            (Option X)	(standard) 0°C to +70°C -20°C to +70°C -40°C to +85°C
Storage:	-45°C to 90°C
Input Voltage:	3.3V ± 0.3V
Input Current:	45mA Typical, 66mA Max
Standby Current: Output:         Symmetry:         Rise/Fall Time:         Load:         Logic:	Differential LVDS 45/55% Max @ zero crossing point 1nSec Max (20% to 80%) 100 Ohms Connected between OUT and COUT
Output Drive Capability (see Note 1):	Zero Impedance Bipolar Proces
Logic: Output Voltage Levels	“0”=0.90 Min, 1.10 Typical “1”=1.43 Typical, 1.60 Max
Differential Output Voltage:             Disable Time:             Start-up Time:	247mV Min, 454mV Max 200ns Max 2mSec Max
Phase Jitter: 12kHz~80MHz	0.5pSec Typical, 1pSec RMS Ma
Phase Noise: (See Plot Below)
Sub-harmonics:	None
Aging:	<3ppm 1st year, <1ppm every year thereafter

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